1. Technical Field of the Invention
The present invention relates generally to printed circuit boards, and more particularly to an improved printed circuit board having a compact and economical structure designed to reduce noise raised from an electronic circuit component such as an integrated circuit (IC) mounted thereon.
2. Background Art
In recent years, high-speed electronic circuits are being developed. Elevating clock frequency of an IC for speeding up its operation causes noise generated by the IC to be increased. For reducing the increased noise, an electromagnetic interference (EMI) filter is commonly used which is arranged adjacent a connector connecting an electronic control unit provided with ICs and an external device.
Such an arrangement, however, encounters a drawback in that EMI filters of the same number as that of connector pins is required, consuming valuable mounting space.
In addition, when control becomes complex, and the number of controlled systems is increased, a great many connector pins are required, resulting in a large-number of EMI filters being needed for reducing noise to acceptable levels.
For avoiding such a drawback, Japanese Patent First Publication No. 2-90587 discloses an arrangement wherein a capacitor is arranged in a circuit for reducing the circuit noise. This prior art however, does not teach a circuit arrangement in detail.